treat cache management instruction taking addresses as "not real memory loads"?

Xref the recently-added memory operands for AArch64 cache management instructions in PR #4386. There we gave them sizes of 1, matching x86's OP_clflush and prefetch instructions (but I noticed that OP_invlpg has a 0 size).

I'm thinking the size of all these cache operations should match OP_invlpg and have a 0 size, and that we should change opc_is_not_a_real_memory_load() to just look for a zero-sized memory operand? I think most tools (taint tracking is always the example I think of) would not want to think of these as reading a byte of memory: they should not interact w/ the taint of data I would think. A cache simulator will already be handling them specially.